Reversible Logic Gates
Reversible
Logic Gates are majorly used to retrieve the input from the outputs. The best
and basic example for the reversible logic gate is the NOT Gate. The output of
the NOT Gate is the inversion of the input. For retrieving the input from the
output of the NOT Gate, we will use the other NOT Gate to it.
Key
points: Input of the output can only be retrieved with the
same reversible logic gate.
There
are couple of standard reversible logic gates which are listed below
·
Feynman Gate
·
Fredkin Gate
·
Toffoli Gate
·
Peres Gates
·
TS-3
·
TSG
·
MTSG
The
Inputs and output of all the standard reversible logic gates are given below.
1. Feynman Gate:
·
The output of
Feynman Gate is simple XOR Gate operation and the other output is for maintained
for the reversibility.
2. Fredkin Gate:
·
The output of
Fredkin Gate is the operation of multiplexer in with the first input as a
status line.
3. Toffoli Gate:
· The 3rd
output of Toffoli Gate can be used for two operation one as an AND gate if the
last input is made to be ‘0’ and another as an XOR gate when the last input
made ‘1’.
4. Peres Gate:
· The output of
peres gate is a combination of both Feynman and Toffoli Gate. If there is
requirement of both Feynman and Toffoli Gate we can directly use peres gate.
·
Another way to
use Peres Gate is like Reversible Half-adder circuit, if the third input is
made to logic ‘0’.
5.
TS-3 Gate:
·
The last output
of the TS-3 Gate is XOR operation of all the three inputs. Remaining two
outputs are for maintaining reversibility.
6.
TSG Gate:
· TSG Gate is a
standardized Gate which can be used for multiple operations.
7.
MTSG Gate
·
MTSG Gate is the
extension of TSG Gate.
·
Most probably the
MTSG Gate is used to design a Reversible Full adder circuit.
Each
and every gate have their own advantages. For making a logic design we can even
join the gates for making reversibility. Consider an example for designing a
reversible logic design, For retrieving the input from the output of the
reversible logic, we need to reorder the design in the reverse manner for
extracting the inputs. In the example, consider A is some 2 input reversible
logic gate (like., Feynman Gate), B is some three input reversible logic gate (like.,
Toffoli Gate/Fredkin/..) and C is a some four input logic gate (the order of
A,B,C in a design can be given in any manner). For retrieving the inputs, the
order of the reversible logic gates is should be exactly reverse with respect
to the design.
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